How to size a PCB trace
How much current a copper trace can really carry, where the IPC-2221 curves come from, and the three things they do not know about your board.
Nothing actually limits the current
The first thing to understand about trace sizing is that a copper track has no current rating. Push more current through it and it does not refuse; it gets hot. Push more still and it gets hotter, until eventually the laminate discolours, the adhesive fails, and at genuinely silly currents the copper behaves as a fuse. So the real question is never "how much can this trace carry" but "how much can it carry before it warms by more than I am willing to accept".
That reframing matters, because it means every trace-width figure you have ever seen came with a temperature rise attached, whether or not it was printed next to the number. A trace rated 3 A at 10 °C rise is the same piece of copper as one rated 4.5 A at 30 °C rise. Neither figure is more correct; they are answers to different questions.
Where the IPC-2221 numbers come from
Almost every trace width calculator, includingthe one on this site, implements the same relationship from IPC-2221:
I = k · ΔT0.44 · A0.725
where I is current in amps, ΔT is the temperature rise in °C, A is the cross-sectional area in square mils, and k is 0.048 for an external trace or 0.024 for an internal one. Internal traces get half the constant because they are buried in laminate, which conducts heat far worse than air does.
Those exponents are worth staring at, because they are not round numbers and they are not derived from theory. They are curve fits to measurements — work done in the 1950s, tidied into a standard, and inherited by every tool since. That pedigree is the honest reason to treat the output as an engineering estimate rather than a prediction: it is empirical data from boards that were not yours, fitted to a curve.
The 0.725 exponent on area also tells you something useful. Because it is less than one, doubling the width does not double the current capacity — it buys about 1.65 times. Copper gets less effective per square mil as you add more of it, because heat escapes from the edges and the middle of a wide trace has nowhere to dump it.
Getting from copper weight to thickness
Cross-sectional area is width times thickness, and thickness comes from the copper weight rather than being specified directly. The convention is an odd one: copper is quoted in ounces per square foot, so "1 oz copper" means the thickness you get if you spread one ounce of copper over a square foot. That works out at 1.378 mils, or about 35 µm.
So a 20 mil wide trace in 1 oz copper has a cross-section of 20 × 1.378 = 27.6 mil². Half-ounce copper halves it; two-ounce doubles it. Thecopper weight calculator does the conversion, and it is worth doing deliberately rather than from memory, because getting the copper weight wrong scales every result.
One practical warning: outer layers usually end up thicker than specified, because plating adds copper during via formation. A board specified as 1 oz outer often arrives closer to 1.5 oz. Inner layers get exactly what was ordered, since nothing is plated onto them. If you are close enough to the limit for that to matter, you are too close to the limit.
The three things the formula does not know
This is where estimating stops and judgement starts. IPC-2221 describes an isolated trace on a board in still air. Your board is not that.
It does not know about copper pour. A trace running next to, or over, a large ground plane sheds heat into it and will run cooler than the formula says. This is the main reason the standard is considered conservative, and it is why experienced designers routinely use narrower traces than a calculator suggests when there is plane nearby. It is also why that habit is dangerous to apply blindly — the pour has to actually be there, and thermally connected.
It does not know about neighbours. Three high-current traces side by side each heat the others, so the bundle runs hotter than any of them would alone. The formula has no term for this, and neither does any tool implementing it.
It does not know about time. The curves assume a steady state. A trace carrying 10 A for 200 ms during inrush behaves completely differently from one carrying 10 A continuously — the copper has thermal mass and simply does not have time to reach equilibrium. Sizing a soft-start path for continuous current wastes board area; sizing a continuous path for a transient is how boards fail.
Heating is often not the binding constraint
On a long trace, voltage drop will usually bite before temperature does — and it is the failure mode that produces confusing symptoms rather than obvious ones. A 3 V logic rail that arrives as 2.7 V does not smell of burning; it causes an intermittent reset that takes a week to find.
Copper resistivity is about 1.68 × 10⁻⁸ Ω·m at 20 °C, and it rises roughly 0.39% per degree, so a hot trace is also a more resistive one — the two effects reinforce each other. For any trace carrying real current over real distance, check the drop as well as the rise. Thevoltage drop calculator is aimed at wire but the arithmetic is identical.
Vias are the part people forget
A trace sized generously for 5 A is undone by a single 0.3 mm via carrying that current between layers. A via's copper is a thin plated barrel, and its cross-section is far smaller than the trace it connects. The usual answer is several vias in parallel — and the usual mistake is one, placed to make the routing tidy.
The via calculator gives the barrel's area and resistance. As a habit, wherever a high-current net changes layer, count the vias and check that they collectively carry what the trace does.
A workable approach
Decide the temperature rise you will accept before you calculate anything — 10 °C for a signal-dense board or anything in an enclosure, 20 °C where there is airflow and nothing heat-sensitive nearby. Size for that. Then check the voltage drop over the actual length, count the vias, and look at what else runs alongside.
And treat the result as a floor rather than a target. Copper is the cheapest thing on the board: widening a power trace beyond what the calculation demands costs nothing but area, and buys margin against everything the formula does not model. The places to be precise are the ones where width is genuinely constrained — under a fine-pitch part, or where impedance matters and the width is set by the stackuprather than by current.